彭治棠

E-mail:d907710@oz.nthu.edu.tw

相關著作：

  1. Parametric Design and Reliability Analysis of Wire Interconnect Technology Wafer Level Packaging, ASME Transaction of Electronic Package, Vol.124, No. 3, pp. 234-239, Sep. 2002
  2. Parametric Reliability Analysis of No-Underfill Flip Chip Package,   IEEE Transactions on Components and Packaging Technologies, Vol. 24, No. 4, pp. 635-640,  Dec. 2001
  3. Reliability Analysis and Design for the Fine-pitch Flip Chip BGA Packaging, IEEE Transactions on Component and Packaging Technologies
  4. Analysis and Validation of Thermal and Packaging Effects of a Piezoresistive Pressure Sensor, Journal of the Chinese Institute of Engineers, Vol. 27, No. 7, pp. 955-964, 2004
  5. Performance and Package Effect of a Novel Piezoresistive Pressure Sensor Fabricated by Front-Side Etching Technology, Sensor and Actuator Journal (SNA)
  6. Overview of Multilayered Thin Film Theories for MEMS and Electronic Packaging Applications, 8th Intersociety Conference on Thermal and Thermommechanical phenomena in Electronic Systems, pp. 1058-1065, May 30-Jun. 1, 2002, San Diego, CA, United States
  7. Investigation of Thermal Effect of Packaged CMOS Compatible Pressure Sensor, 2002 ASME International Mechanical Engineering Congress and Exposition, pp. 505-512, Nov. 17-22, 2002, New Orleans, LA, United States
  8. The Reliability Analysis and Structure Design for the Fine Pitch Flip Chip BGA Package, 4th International Conference on Thermal & Mechanical Simulation and Experiments in Microelectronics and Microsystems, pp. 413-420, Mar. 30-Apr. 2, 2003, Aix-en-Provence, France
  9. Analysis and Validation of Sensing Sensetivity of a Piezoresistive Pressure Sensor, 2003 International Electronic Packaging Technical Conference and Exhibition, pp. 225-231, Jul 6-11, 2003, Haui, HI, United States
  10. A Novel Silicon Base Piezoresistive Pressure Sensor Using Front Side Etching Process, pp. 79-86, 2003 ASME International Mechanical Engineering Congress, Nov 15-21 2003, Washington, DC, United States
  11. Design and Analysis of the CMOS Compatible Pressure Sensor Using Flip Chip and Flex Circuit Board Technologies, pp. 43-49, 2003 ASME International Mechanical Engineering Congress, Nov 15-21 2003, Washington, DC, United States
  12. Design, Fabrication and Comparison of Lead-Free/Eutectic Solder Joint Reliability of Flip Chip Package, 5th international conference on thermal, mechanical and thermo-mechanical simulation and experiments in micro-electronics and icro-systems, pp. 149-156, Brussels, Belgium, May 10-12, 2004
  13. Experimental Characterization and Mechanical Behavior Analysis on Intermetallic Compounds of 96.5Sn-3.5Ag and 63Sn-37Pb Solder Bump with Ti-Cu-Ni UBM on Copper Chip, 54th Electronic Components and Technology Conference, Las Vegas, United States

參與計畫：

  1. 樺晶科技公司-新型微壓力感測器研發與製造
  2. 威盛電子-覆晶封裝之結構設計與可靠度測試
  3. 威盛電子- a. 無鉛銲錫應用於覆晶封裝之結構設計與可靠度測試 b.無鉛銲錫之金屬界層成長與力學強度測試
  4. 威盛電子-覆晶封裝結構可靠度之參數化有限元素分析與設計
  5. 台灣積體電路公司-奈米級銅導線製程線路之有限單元參數化分析
  6. 工業技術研究院電子工程研究所                  構裝製程技術組-專利工程師

專利：

  1. 低熱應力與高靈敏度點對點接合之微感測器結構（中華民國專利，發明第一六五四二八號）
  2. 矽材壓力微感測元件及其製造方法 （中華民國專利，公告號500916）